Abstract

AbstractFPGA architectures have been intensely investigated over the past two decades. A major aspect of FPGA architecture research is the development of Computer Aided Design (CAD) tools for design and implementation of fast and high density FPGAs and mapping applications to it. It is well established that the quality of an FPGA based implementation is largely determined by the effectiveness of accompanying suite of CAD tools. Benefits of an otherwise well designed, feature rich FPGA architecture might be impaired if the CAD tools cannot take advantage of the features that the modern FPGA design provides. Thus, CAD algorithm research is essential to the necessary architectural advancement to narrow down the performance gaps between FPGAs and other computational devices like ASICs. This chapter discuss different algorithms and methodologies used to create 2D FPGA placement, routing, mapping application etc.KeywordsCritical PathBoolean NetworkLogic BlockAttraction FunctionAnnealing ScheduleThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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