Abstract
In this paper, an experimental study is proposed to investigate the failure effects in IGBT large-area devices due to hard gate driving strategies. Thanks to quasi-3D simulations, a large overcurrent is predicted in few cells and corresponds to a large spike in the gate voltage during collector voltage transient, which is able to trigger the device instability.An interpretation of the phenomenon is given that attributes such spike to a strong current imbalance on the large area device, so that a latch-up failure mechanism is proposed.
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