Abstract
In ultrascaled field-effect transistors (FETs), the thermionic limit to subthreshold swing (SS) represents a serious issue impeding their low-power application. Here, we propose a novel tunneling cold source FET (TCS-FET) to realize steep-slope (with SS less than 60 mV/dec) low-power devices, in which a p-n junction serves as cold source as a result of self-filtering of the electronic thermionic tail. Our first-principles calculations on the electrical properties of the TCS-FET based on monolayer MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> predict that large ON/OFF current ratio ( I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> / I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ) up to 1.6 ×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9</sup> and steep SS as small as 32 mV/dec can be obtained. Moreover, by considering atomic doping at the source, we demonstrate that defects engineering is effective in optimizing both I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> / I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> and SS of the devices. This study is important for guiding the design of nanoscale steep-slope FETs based on 2-D materials.
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