Abstract

Experimental results for MOS tunnel structures are discussed and compared to the theory developed in the preceding paper. The low frequency (d.c.) conductance yields a well width wider than the band gap of silicon. For 10 ω-cm p-type silicon, with an oxide thickness of 46 Å, V w =1.96 eV, in good agreement with the theory, including the effects of interface states. Similar results are obtained for n- and p-type non-degenerate silicon. Structure appears in the conductance well for higher frequency signals. The origin of these peaks is discussed. It is shown that one peak is due to a geometric effect while the second is due to interface states. The conductance due to interface states can be accounted for by the time lag in charge exchange between the majority carrier band in the semiconductor and the interface states; tunneling from the metal to these interface states is not observed. This work indicates a localized state at 0.27 eV above the valence band for 10 ω-cm p-type silicon. The concentration is 7.4 × 10 11 cm −2 and the capture cross-section is 5.0 × 10 −18 cm 2. Capacitance measurements indicate another localized state at 0.14 eV above the valence band which does not contribute to the conductance measurements because of its long time constant.

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