Tunneling component suppression in charge pumping measurement and reliability study for high- k gated MOSFETs

Abstract

Although charge pumping (CP) is a powerful technique to measure the energy and spatial distributions of interface trap and oxide trap in MOS devices, the parasitic gate leakage current in it is the bottleneck. A CP method was modified and applied to high- k gate dielectric in this work to separate the CP current from the parasitic tunneling component in MOS devices. The stress-induced variations of electrical parameters in high- k gated MOS devices were investigated and the physical mechanism was studied by the modified CP technique. The stress-induced trap generation for devices with HfO 2-dominated high- k gate dielectrics is like mobile defect; while that with SiO 2-dominated ones is similar to the near-interface/border trap.