Tunnel Junction Engineering for Optimized Metallic Single-Electron Transistor

Abstract

The development of metallic single-electron transistor (SET) depends on the downscaling and the electrical properties of its tunnel junctions (TJs). These TJs should insure high-ON current, low-OFF current, and low capacitance. We propose an engineered TJ based on multidielectric stacking. A number of high- $k$ and low- $k$ materials were considered to optimize the TJ’s characteristics. The optimized TJ is proven to increase the $I_{\mathrm{{\scriptscriptstyle ON}}}$ current and the $I_{\mathrm{{\scriptscriptstyle ON}}}/I_{\mathrm{{\scriptscriptstyle OFF}}}$ ratio in a double-gate SET. Using TiO2 plasma oxidation and Al2O3 atomic layer deposition, an SET proof of concept, with a double layer TJ, was fabricated and characterized.