Abstract
We report on fabrication of tunnel field-effect transistor with III-V nanowire (NW)/Si heterojunction and surrounding-gate structure. The device fabricated by selective-area growth of an n+-InAs/undoped-InAs axial NW on a p+-Si(111) substrate showed switching behavior with an average subthreshold slope (SS) of 104 mV/dec under reverse bias condition. The switching behavior appeared under small supply voltage (Vds=50 mV). Transmission electron microscopy revealed misfit dislocation formed at the interface degraded the SS and ON-state current. Coherent growth without misfit dislocations would promise realization of steep-slope transistor with a SS of <60 mV/dec.
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