Tuning the interlayer microstructure and residual stress of buffer-free direct bonding GaN/Si heterostructures

Abstract

The direct integration of GaN with Si can boost great potential for low-cost, large-scale, and high-power device applications. However, it is still challengeable to directly grow GaN on Si without using thick strain relief buffer layers due to their large lattice and thermal-expansion-coefficient mismatches. In this work, a GaN/Si heterointerface without any buffer layer is fabricated at room temperature via surface activated bonding (SAB). The residual stress states and interfacial microstructures of GaN/Si heterostructures were systematically investigated through micro-Raman spectroscopy and transmission electron microscopy. Compared to the large compressive stress that existed in GaN layers grown on Si by metalorganic chemical vapor deposition, a significantly relaxed and uniform small tensile stress was observed in GaN layers bonded to Si by SAB; this is mainly ascribed to the amorphous layer formed at the bonding interface. In addition, the interfacial microstructure and stress states of bonded GaN/Si heterointerfaces was found to be significantly tuned by appropriate thermal annealing. With increasing annealing temperature, the amorphous interlayer formed at the as-bonded interface gradually transforms into a thin crystallized interlayer without any observable defects even after annealing at 1000 °C, while the interlayer stresses at both GaN layer and Si monotonically change due to the interfacial re-crystallization. This work moves an important step forward directly integrating GaN to the present Si CMOS technology with high quality thin interfaces and brings great promises for wafer-scale low-cost fabrication of GaN electronics.