Tunable Peeling Technique and Mechanism of Thin Chip From Compliant Adhesive Tapes

Abstract

The efficient pick-up of thin/ultrathin integrated circuit chip from the wafer is one of the key techniques in advanced microelectronic packaging, whose success rates are determined by the peeling-off of chip from the adhesive tapes. Analytical models for estimating the effects on process parameters represent important design tools. Here, solutions for adhesive stresses and mixed-mode peeling are presented in chip-adhesive-substrate structure based on mixed boundary conditions, in which the geometrical dimensions and material properties of this three-layer system are included. Analytical expressions are defined in terms of structural parameters and several integration constants, which can be obtained by a given system of linear equations. These models agree well with finite element models with virtual crack-closure technique. In particular, the mechanism of tunable mode peeling is uncovered, and the technological limit of normal single ejecting needle is discussed.