TTC Interface Module for ATLAS Read-Out Electronics : Final production version based on Xilinx FPGA devices

Abstract

The functionality and the details of the upgraded firmware and hardware of the Xilinx FPGA-based production version of the ATLAS-SCT TTC Interface Module (TIM) are described. The TIM interfaces ATLAS SCT, Pixel, MDT and CSC Read-Out Drivers to the ATLAS Level-1 Trigger using the LHC-standard TTC (Timing, Trigger and Control) and Busy systems. Twelve prototype TIM modules, based on ten AMD/Lattice CPLD devices, have been produced and used since 2001. Final production modules, based on two Xilinx FPGAs, are in manufacture. The details of the transition in hardware and firmware from CPLD to FPGA are described.