Abstract

Through silicon via (TSV) cross coupling can seriously degrade circuit performance of 3-D ICs if it is not considered during design. In this paper, we propose two algorithms which combine coupling-aware TSV placement with shield insertion to yield better results than either technique alone. We first introduce an algorithm for TSV placement assuming a fixed standard cell placement. The result of this algorithm is a 13% reduction in worst case coupling across all TSV pairs and a 90% reduction in the total number of TSV pairs violating an imposed coupling threshold. We then introduce a second algorithm that perturbs a given standard cell and TSV placement to improve coupling. This second algorithm yields a 17% reduction in worst case coupling and removes all coupling violations. Both algorithms cause wirelength (WL) to increase no more than 5%. Our algorithms offer a large improvement to TSV-TSV coupling at the expense of only a meager degradation of total WL, and in many designs and applications this trade-off is well justified.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.