Abstract

Department of Mechanical and Industrial Engineering, University of Toronto, Toronto M5S 2J7, Canada (Received December 30, 2013; Revised January 23, 2014; Accepted February 11, 2014)Abstract: With the recent advent of through silicon via (TSV) technology, wafer level-TSV interconnection become feasible in high volume manufacturing. To increase the manufacturing productivity, it is required to develop equipment for backside passivation layer deposition for TSV wafer bonding process with high deposition rate and low film stress. In this research, we investigated the relationship between process parameters and the induced wafer stress of PECVD silicon nitride film on 300 mm wafers employing statistical and artificial intelligence modeling. We found that the film stress increases with increased RF power, but the pressure has inversely proportional to the stress. It is also observed that no significant stress change is observed when the gas flow rate is low.Keywords: Through silicon via, Modeling, PECVD, TSV backside passivation, RSM

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