True-Time-Delay Receiver IC With Reconfigurable Analog and Digital Beamforming

Abstract

Spatial diversity advantages such as improved signal-to-noise ratio and in-band blocker filtering can be achieved through beamforming in the digital and/or analog domain. Digital beamforming benefits from the precision and efficient parallelization of digital signal processing. On the other hand, analog beamforming allows the filtering of in-band but out-of-beam blockers before the ADC which can improve the dynamic range performance of the receiver. A delay method based on resampling has recently emerged as a viable solution for enabling true-time-delay analog beamforming receivers, which overcome the fractional bandwidth limitation of phase-shift beamforming due to beam squint. This paper presents a 22-nm CMOS receiver prototype that enables reconfiguration between true-time-delay analog and digital beamforming to allow choosing the more suitable operation mode in different signal environments. The reconfigurability is achieved by exploiting the time-interleaved nature of both the resampling delay setup and high speed ADCs. In addition to the beamforming mode reconfigurability, the receiver achieves state-of-the-art 2 GHz instantaneous beamformed bandwidth in the analog mode. The receiver reaches a 100% fractional bandwidth at the low end of the 1–6 GHz frequency range.