True Random Number Generation From Commodity NVM Chips

Abstract

In this article, we propose a novel technique to generate true random numbers (TRNs) using off-the-shelf non-volatile memory (NVM) chips. In particular, we illustrate a TRN generator (TRNG) extraction methodology from two types of NVM technologies: 1) emerging resistive NVM, and 2) charge-based NOR flash. We exploit the variability in programming latency while performing write and erase operations. The main causes of such effects can be attributed to the switching-time variability of the NVM devices and second-order effects, such as peripheral CMOS variability and circuit parasitics. Through multiple experiments, we show that dominant variability contribution arises from NVM switching-time distributions. In order to increase the quality of randomness, we propose an XOR-based post-processing technique. In the proposed methodology, latency values are first extracted from multiple locations on the chip followed by the application of post-processing technique. The randomness of the generated bitstream is evaluated using NIST SP 800-22 statistical test suite, and all the 15 tests are passed with encouraging P-values. We validated the proposed NVM-based TRNG for a wide range of operational temperatures (−40 °C to +85 °C). Utilization of the existing NVM chips and no requirement of additional specialized hardware make the proposed TRNG technique highly advantageous and cost-effective.