Trapping Effect in AlInN/GaN HEMTs: A Study Based on Photoionization and Pulsed Electrical Measurements

Abstract

The aim of this article is to detect electron traps in AlInN/GaN transistors operating at room temperature by combining pulsed electrical measurement with photoionization techniques to rapidly assess their activation energies and time constants. In addition, this technique can also reveal the presence of electron traps that cannot be observed by using pulsed measurements alone. Thus, two electron traps were identified including a deep level whose origin could be related to dislocations in the GaN buffer existing in the devices. At the same time, this study has shown that the time constants of these electron traps are inferior to 400 ns and that the electrical behavior of the components is also degraded by the presence of surface states with a time constant of 4 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{s}$ </tex-math></inline-formula> . Moreover, these two traps are at the origin of the gate lag effects observed during the pulsed electrical characterization of the AlInN/GaN high electron mobility transistors (HEMTs). Likewise, a negative output conductance induced by a trapping effect has been put forward.