Trap Characterization of Trench-Gate SiC MOSFETs Based on Transient Drain Current

Abstract

The SiC/SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> interface state is one of the main factors that limit the performance and reliability of the SiC metal-oxide-semiconductor field-effect transistor (MOSFET). In this paper, we use a Bayesian deconvolution algorithm to optimize trap feature extraction based on the transient current method and improve the trap extraction accuracy. Using this method, we study the trap capture mechanism in SiC MOSFETs and mainly characterize the trap position, the trap energy level, and the capture time constant. The results obtained show that there are three different types of traps and defects, two of which are SiC interface traps at the gate-source and gate-drain interfaces, with activation energies of 0.089 eV and 0.035 eV, respectively; the third trap type is an oxide trap, and its time constant does not vary with temperature. The characterization results are verified via deep level transient spectroscopy, and the results show reasonable agreement with those obtained by the method proposed in this paper. This method can be combined with electrical stress testing in long-term reliability research to realize nondestructive characterization of the defects of SiC MOSFETs.