Trap-assisted tunneling on extended defects in tunnel field-effect transistors

Abstract

Dislocations are fundamental crystal defects. Their randomized incorporation, as in the case of heterostructures, result in deterioration of device performance. The present paper deals for the first time with the effect of defined numbers and types of dislocations in the near intrinsic region of tunnel field-effect transistors (TFETs). Model devices were prepared on silicon-on-insulator (SOI) substrates with well-defined dislocation networks. Analogous devices without dislocations act as reference. The impact of the drain–source (VDS) and gate–source voltages (VGS) were analyzed separately. The temperature dependence of the output and transfer characteristics were measured. Thermionic emission was proved as the dominant mechanism of trap-assisted tunneling for different dislocation types. Different barrier heights, however, were extracted for screw and mixed dislocations referring to different electronic structures of different dislocation types.