Transport properties of graphene field effect transistors

Abstract

Nowadays, integrated circuit design and manufacturing level is one of important symbols to evaluate the industrial development level of a country. Silicon-based metal oxide semiconductor field effect transistor has an important application in large-scale integrated circuit, and its special size has reached 14nm. However, further miniaturization in reaching the silicon physical limits of 10nm channel length. Graphene is one of the most promising materials to replace silicon. Due to its outstanding performance such as ultrafast carrier mobility, excellent mechanical strength and high transparency invisible light region, graphene is regarded as one of the vital next generation electronic materials. In recent years, the rapid development of the preparation technology of large area and high quality graphene has further promoted the research of new electronic devices based on graphene, which has attracted wide attention of researchers in the field of integrated circuit. Graphene field effect transistor has fast response rate and high cut-off frequency, whose feature size can continue to narrow. Therefore, the study of graphene field effect transistors has very important significance for the continuation of Moore’s law. Currently, SiO2 is generally used to the gate insulating layer of graphene field effect transistors. The dielectric constant value of SiO2 is lower, which leads to higher power consumption of the device. When the thickness of the SiO2 gate insulating layer is reduced to a certain degree, the device is easy to breakdown. However, when the semiconductor materials with high dielectric constant (Ta2O5, TiO2, Al2O3, etc.) as the gate insulating layer, the device can obtain higher mobility in the operating voltage as low as possible. This is an effective way to solve the high power consumption of the device. Although graphene field effect transistors have made some progress in the preparation and performance, the existing field effect transistors based on graphene have no obvious advantage in carrier mobility and current on/off ratio. Accordingly, the research of graphene field effect transistor will be the main direction of the field of integrated circuit in the future. In this paper, the graphene field effect transistors use ITO as the gate electrode, Ta2O5 as the gate insulating layer, graphene as the active layer, Ti/Au double-layer metal as the source/drain electrodes. The results of electrical properties measurements and analyses show that the graphene strip is in good ohm contact with source/drain electrodes. At room temperature, graphene field effect transistors exhibit an unique bipolar characteristic. The mobility for hole carrier is about 2272cm2/(Vs) and the current on/off ratio is about 6.2. The hysteresis phenomenon in the transfer characteristic curve is observed, which becomes more obvious with the increase of gate voltage. Meanwhile, the effect of the temperature on the characteristic of the graphene field effect transistor is studied. With the increase of temperature, the Dirac point voltage gradually shifts to zero point, and the hysteresis phenomenon becomes more and more obvious. The mobility for hole carrier and the current on/off ratio achieve optimum when the temperature is 75°C. The content and conclusions of above may provide a reference for further research of graphene field effect transistors.