Transmission Electron Microscopy to Study Gallium Nitride Transistors Grown on Sapphire and Silicon Substrates

Abstract

Ever since Gallium Nitride based high electron mobility transistor (HEMT) operation was demonstrated (Khan, 1993), there is a tremendous interest in the design and growth of GaN based transistors for high power device applications. The nitride semiconductors have wide application in the fields of high electron mobility transistors (HEMTs), light emitting diodes, and various high power electronic devices. The peak electron velocity, electron mobility in GaN surpasses the best performance reported from Si based devices. GaN and related materials are highly attractive for high power and high temperature electronic devices owing to their large bandgap energy (3.4 eV), high breakdown field (3 x 106 V/cm) (Pearton, 2006) and excellent chemical stability. The growth of these nitrides layers require a substrate which should be cost effective and lattice matching to GaN. For over the past few decades, SiC, sapphire and silicon are the substrates commonly used for the growth of GaN for application as HEMTs, LEDs and other electronic devices. The choice of a suitable substrate for the growth of III-nitride semiconductor devices is very important as it influences the lattice mismatch and quality of GaN. Today most of the GaN based heterostructures (HSs) were grown either on c-plane (0001) sapphire or silicon. The GaN growths on silicon develop cracks due to high tensile stress and ends up in large number of threading dislocations. Poor matching between GaN and sapphire both in terms of lattice parameter and thermal expansion coefficient results in a high dislocation density as high as 109 – 1010 cm-2.