Abstract
To address the limited linearity range of current-mode logic circuits used for four-level pulse amplitude modulation (PAM-4) symbol generation, a voltage-mode, inverter-like circuit featuring a stacked transistor–resistor structure is proposed. Simulation results have shown that the linearity of the proposed PAM-4 circuit has been improved by 43.1%, with a modest increase of circuit area. Additionally, 20% resistance mismatch in the proposed PAM-4 symbol generator leads to linearity degradation of <9%.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
