Abstract
The emergence of Silicon (Si) photonics necessitates the development of automated testing and validation techniques. Si-photonic device operation is sensitive to variations in the manufacturing process. This paper describes a methodology and abstraction models to evaluate the effect of variations in the dimensions of waveguides, spacing and modulation parameters on Si-photonic circuits. Such variations may result in signal degradation and phase mismatch, causing interference based devices to operate imperfectly. Experiments are performed on various (linear) optical devices by introducing geometric and layout deformities, and compact models are abstracted in terms of Transfer Matrices. Using these models, we show how the impact of design or manufacturing variations in a device can be analyzed on the operation of optical logic circuits that integrate various such components. The method is validated by experiments performed on conventional SOI waveguide based devices and circuits.
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