Abstract

In the traffic field, the traffic sign detection and recognition system is an important part of ADAS. In this paper, a research on traffic sign recognition is carried out, and a traffic recognition sign recognition network is established with the GTSRB data set as the research object. A network computing accelerator is designed with "ARM+FPGA" framework; the functional modules of each part of the network are reasonably divided; and high-level synthesis tools are used to optimize the design of loop unwinding and loop flow to improve throughput and improve recognition speed. The experimental results show that the network has a high accuracy rate in each classification. After optimization, the processing speed of the system under the 100MHz clock is increased by 5.59 times. This method provides an effective reference for the identification of other specific signs.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call