Abstract
The speed performance and static power dissipation of the ultra-thin-body (UTB) MOSFETs have been comprehensively investigated, with both DC and AC behaviours considered. Source/drain extension width (Lsp) and silicon film thickness (tsi) are two independent parameters that influence the speed and static power dissipation of UTB silicon-on-insulator (SOI) MOSFETs respectively, which can result in great design flexibility. Based on the different effects of physical and geometric parameters on device characteristics, a method to alleviate the contradiction between power dissipated and speed of UTB SOI MOSFETs is proposed. The optimal design regions of tsi and Lsp for low operating power and high performance logic applications are given, which may shed light on the design of UTB SOI MOSFETs.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
