Abstract
The tracking performance of a first-order digital phase-locked loop to an input signal with narrow pulse width having an adjustable duty cycle has been investigated. Theoretical expressions for the upper-lock frequency and the lower-lock frequency have been derived, and hence an expression for lock range of the loop in terms of the input duty cycle has been derived. The locking behaviour of the loop for varying duty cycle of the input and the maximum lock frequency range have been investigated theoretically. All the results have been verified experimentally.
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