Towards a Formal Treatment of Logic Locking

Peter Beerel,Pierluigi Nuzzo,Alex J Malozemoff,Ben Hamlin,Marios Georgiou

doi:10.46586/tches.v2022.i2.92-114

Abstract

Logic locking aims to protect the intellectual property of a circuit from a fabricator by modifying the original logic of the circuit into a new “locked” circuit such that an entity without the key should not be able to learn anything about the original circuit. While logic locking provides a promising solution to outsourcing the fabrication of chips, unfortunately, several of the proposed logic locking systems have been broken. The lack of established secure techniques stems in part from the absence of a rigorous treatment toward a notion of security for logic locking, and the disconnection between practice and formalisms. We seek to address this gap by introducing formal definitions to capture the desired security of logic locking schemes. In doing so, we investigate prior definitional efforts in this space, and show that these notions either incorrectly model the desired security goals or fail to capture a natural “compositional” property that would be desirable in a logic locking system. Finally we move to constructions. First, we show that universal circuits satisfy our security notions. Second, we show that, in order to do better than universal circuits, cryptographic assumptions are necessary.

Highlights

Integrated circuits often represent the root of trust of modern computing systems
The definitions of indistinguishable logic locking (IND-LL) and SIM-LL do not explicitly allow part of the circuit to remain unlocked, they do guarantee security in this scenario. We show this by means of a notion we call contextual functional secrecy (CFS), which IND-LL and SIM-LL both imply, and prior notions do not
To prove that a scheme is CFS-secure, one should instead prove that it is secure in the sense of IND-LL or SIM-LL, since as we show in Theorem 6, these imply CFS

Summary

Introduction

Over the years, the design and manufacturing process has been decentralized to include multiple players in the supply chain, and this decentralization has raised the risk of threats such as intellectual property piracy and reverse engineering. A malicious manufacturer may attempt to steal and reproduce a proprietary algorithm, extract secret keys or information hardwired in the design, or overproduce. The goal of logic locking is to modify the logic of the circuit in such a way that the circuit becomes “useless” without the knowledge of an additional secret key that is only known to the designer. A designer could “lock” the circuit and hand the locked circuit to the foundry. Upon receiving the resulting (locked) chip, the designer could “unlock” the circuit to recover the original circuit’s functionality

Objectives

Discussion

Conclusion