Abstract
Future X-ray missions such as Lynx require large-format imaging detectors with performance at least as good as the best current-generation devices but with much higher readout rates. We are investigating a Digital CCD detector architecture, under development at MIT Lincoln Laboratory, for use in such missions. This architecture features a CMOS-compatible detector integrated with parallel CMOS signal processing chains. Fast, low-noise amplifiers and highly parallel signal processing provide the high frame-rates required. CMOS-compatibility of the CCD provides low-power charge transfer and signal processing. We report on the performance of CMOS-compatible test CCDs read at rates up to 5 Mpix s−1 (50 times faster than Chandra ACIS CCDs), with transfer clock swings as low as ±1.5 V (power/area < 10% of that of ACIS CCDs). We measure read noise below 6 electrons RMS at 2.5 MHz and X-ray spectral resolution better than 150 eV FWHM at 5.9 keV for single-pixel events. We discuss expected detector radiation tolerance at these relatively high transfer rates. We point out that the high pixel ’aspect ratio’ (depletion-depth : pixel size ≈ 9 : 1) of our test devices is similar to that expected for Lynx detectors, and illustrate some of the implications of this geometry for X-ray performance and noise requirements.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have