Abstract
To mitigate the total ionizing dose (TID) radiation impact, a new structure named double-silicon-on-insulator (DSOI) is introduced in this article. This new structure exhibits potential benefits of reducing the radiation-induced degradation effectively and independently, thanks to the additional electrode, which can be used to control the internal electrical field of the device. With this structure, the TID response and TID mitigation strategy using back-bias are discussed in DSOI nMOSFETs. Then, a 3-D TCAD simulation model is proposed to analyze the radiation-induced leakage path for each bias configuration. The impact of negative back-bias during irradiation on trapped charge distribution is given for both buried oxide layer and shallow trench isolation. At last, a 4k-bit static random access memory is used to verify the effectiveness of back-bias on TID-induced leakage current suppression at the circuit level. The experimental results show the possibility of using back-bias against TID threat.
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