Torus network labeling in High Performance computing

Abstract

Two prime network interconnection topology used today in High Performance computing (HPC) are the fat tree and the torus topology. But due to the various advantages of torus network over fat tree, currently many HPC networks using fat tree are turning to the torus topology. In fat tree topology the switches have high end functionalities. Suppose a packet is traversing from the source to destination. If it has an address which is outside the range of addresses at a particular cluster head switch, then the switches at higher level with respect to the end nodes are used to route the packets to other clusters. Here checking for the destination address at all clusters is avoided, which is a great advantage of fat tree topology. On the other hand torus topology has no inheritance in the interconnection design while every node possess alike capability. This is the reason interval switching is not easy in torus network. A simple method of labeling is proposed which can be used to overcome this disadvantage of the torus topology and avail torus topology for using interval based switching. This paper shows need for labeling of nodes and four labeling schemes for the torus topology with their comparison performed with the graph theory.