Abstract
The paper describes a GSPN-based approach to performance evaluation of message-passing parallel architectures, taking into account both the effects of the synchronization schemes and the interconnection topology. Two classes of problems are specifically addressed: the behavior of regular computational structures in which data exchange and interprocess synchronization require communication only among processors that are physically connected communication only among processors that are physically connected is investigated first. Then, the effect of differences in topology and interconnection schemes of the processing elements is assessed under a series/parallel computational workload. The effectiveness of the modeling technique for this class of architectures is demonstrated by its ability in representing different interaction policies and in describing the relationships between computational workload and physical resources, along with the efficiency in obtaining significant performance results.
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