Top‐Gate Organic Thin‐Film Transistors Constructed by a General Lamination Approach

Abstract

www.MaterialsViews.com C O M M U Top-Gate Organic Thin-Film Transistors Constructed by a General Lamination Approach N IC A T By Lei Zhang , Chong-an Di , * Yan Zhao , Yunlong Guo , Xiangnan Sun , Yugeng Wen , Weiyi Zhou , Xiaowei Zhan , * Gui Yu , and Yunqi Liu * IO N Solution-processed organic thin-fi lm transistors (OTFTs) have received increasing interest because they are thought to be promising candidates for low-cost electronics applications. [ 1 , 2 ] Organic materials offer the benefi t that they can be printed on fl exible polymeric substrates at low temperature by means of solutionbased techniques, which results in a dramatic reduction of manufacturing costs. However, very few organic semiconducting materials possess high environmental stability, hindering their practical applications. Bottom-gate OTFTs are a conventional device structure for material-testing purpose. Unfortunately, the oxygen and moisture can easily penetrate into the active layer and degrade the device performances for bottom-gate OTFTs because the organic semiconducting materials are exposed to air. [ 3–5 ] On the contrary, in top-gate OTFTs the active layer is self-encapsulated by the gate dielectric layer and the gate electrode and, therefore, the device stability is signifi cantly improved. [ 6 , 7 ] It has been recently demonstrated by different groups that top-gate OTFTs exhibit higher stability than bottom-gate devices. [ 8 ] As a result, fabrication of high-performance top-gate OTFTs is highly desirable and have received considerable attention. The dielectric/organic semiconductor interface, the most important one in OTFTs, plays a key role in the device performance, because the conductive channel is located on the few molecular layers near the gate dielectric layer. [ 9–11 ] Consequently, deposition of the dielectric layer on the organic semiconductor is a key step and a challenging task in the fabrication of top-gate OTFTs, especially solution processed devices. So far, the use of orthogonal solvents is the most widely used approach for the fabrication of solution-processed top-gate OTFTs. [ 12–14 ] Nonetheless, orthogonal solvents have to be selected carefully to minimize any adverse effects during the deposition of the organic semiconducting layer and the dielectric layer in two successive steps. Despite the signifi cant progress made over the past few years with the use of this approach, some problems remain. Firstly, although it is possible to ensure that the solvent used for the deposition of the insulating layer does not dissolve the