Top-down integration of suspended N+/P/N+ silicon-nanowire-based ion-sensitive field effect transistors for pH analysis at the submicronic scale

Abstract

A technological process was proposed in order to integrate fully silicon-nanowire-based field-effect nanodevices on a silicon-on-insulator (SOI) substrate. Thanks to a double reactive ion etching process of the SOI silicon upper layer as well as to a "SiO2 thermal oxidation growth / Al2O3 atomic layer deposition" gate process, silicon-nanowire-based field-effect transistors (SiNW-FET) and silicon-nanowire-based ion-sensitive field-effect transistors (SiNW-ISFET) were fabricated. Focuses were brought on (i) the integration of a suspended N+/P/N+ double-junction structure (gate length: ∼ 0.75 μm and ∼ 3.75 μm), (ii) the fabrication of a SiO2/Al2O3 all-around surrounding gate structure, (iii) the achievement of low nanowire sections (width: ∼ 150 nm, height: ∼ 200 nm), and (iv) the final adaptation to the liquid phase analysis thanks to SU8-based wafer-level packaging. According to the proposed process, SiNW-FET and SiNW-ISFET devices showed excellent electrical characteristics in terms of leakage resistance ROFF, subthreshold current slope and ION/IOFF maximal ratio. SiNW-ISFET devices were finally studied for the pH analysis at the submicronic scale (analysed volumes: ∼ 10 pL), evidencing standard potentiometric detection sensitivity (∼ 56 mV/pH), as well as excellent amperometric detection sensitivity (∼ 0.4 current decade per pH) in subthreshold regime.