Abstract
One of the remaining obstacles to approaching the theoretical efficiency limit of crystalline silicon (c-Si) solar cells is the exceedingly high interface recombination loss for minority carriers at the Ohmic contacts. In ultra-thin-film c-Si solar cells, this contact recombination loss is far more severe than for traditional thick cells due to the smaller volume and higher minority carrier concentration of the former. This paper presents a novel design of an electron passing (Ohmic) contact to n-type Si that is hole-blocking with significantly reduced hole recombination. This contact is formed by depositing a thin titanium dioxide (TiO2) layer to form a silicon metal-insulator-semiconductor (MIS) contact. A 2 {\mu}m thick Si cell with this TiO2 MIS contact achieved an open circuit voltage (Voc) of 645 mV, which is 10 mV higher than that of an ultra-thin cell with a metal contact. This MIS contact demonstrates a new path for ultra-thin-film c-Si solar cells to achieve high efficiencies as high as traditional thick cells, and enables the fabrication of high-efficiency c-Si solar cells at a lower cost.
Highlights
Ultra-Thin-Film crystalline silicon (c-Si) solar cells have attracted great interest due to their potential of lowering the cost and increasing the efficiency of c-Si solar cells [1]–[4]
We have demonstrated a carrier-selective contact with a TiO2 MIS structure
We use TCAD simulations to analyze the recombination loss in thin cells and to reveal why the Voc is improved by the MIS contact
Summary
Ultra-Thin-Film crystalline silicon (c-Si) solar cells have attracted great interest due to their potential of lowering the cost and increasing the efficiency of c-Si solar cells [1]–[4]. As the recombination loss in the bulk Si is substantially reduced because of the thickness reduction of solar cells, the recombination loss at surfaces, especially the metal Ohmic contacts, becomes the main obstacle for high performance. The a-Si:H layer in HIT cells has high parasitic absorption and defect concentrations that result in a loss in the short circuit current (J sc) [10], [11]. Another method is to deposit a thin tunneling silicon dioxide (SiO2) layer as a carrier selective contact [12]–[14], [27]. To achieve low contact resistance, the thickness of the tunneling SiO2 layer has to be precisely controlled, which could be challenging for large-scale manufacturing
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