Time-Varying Resistance Optimization for the Resistive Type Superconducting Fault Current Limiter Applied in VSC-HVDC System

Abstract

When short-circuit fault occurs in a voltage source converter–based high-voltage direct current (VSC-HVDC) transmission system, the fault current curve is much more complex than conventional AC power grid. The high-voltage DC circuit breaker with large cut-off capacity is rather expensive; thus, some current limiting methods are proposed to limit the fault current. The superconducting fault current limiter (SFCL) is one of the promising devices for both AC and DC short-circuit current limiting application. The optimization criterion for SFCL applied in VSC-HVDC system is presented, and a four terminal VSC-HVDC system is adopted as an example. The short-circuit fault could be divided into condenser discharge and AC system feeding process, and the fault current curve is related to the time-varying RLC parameters of the grid. The thermal and resistance characteristics of the SFCL are analyzed, and the optimization method of the current limiting impedance and thermal characteristics of the SFCL is developed based on the time-varying fault current. Finally, the design of a 160-kV SFCL was completed based on the proposed method.