Abstract
Our project team designed and realized an Automatic Identification System (AIS) terminal equipment specifically which is based on an ARM7 chip and compatible with a self-developed FPGA chip. The main research topic is about the timeslot management and implementation in this equipment. I designed a timeslot list in the form of an array, to storage every timeslot state in each channel and current frame real-time, intuitively, and conveniently. When there is a timeslot-occupied or a timeslot-reserved in the equipment, the timeslot list can storage the timeslot state real-time. This timeslot state is defined as whether each timeslot is currently occupied, what action occupied it, how long the timeout is. And manage the timeslot every timeslot by timeout, to realize each timeslot management in A/B channels. When the equipment will select candidate timeslots to send message, it could read the timeslot state by the timeslot number directly to know whether it can send message in this timeslot. Make sure its timeslot reuse, prevent its timeslot collision, and realize the communication real-time and effective.
Published Version
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