Abstract

In this paper, we present a novel single-path multi-bit delta-sigma analog-to-digital converter (/spl Delta//spl Sigma/ ADC) architecture that uses time as a reference for performing multi-bit digital-to analog conversion in the feedback path. The architecture uses a voltage-controlled oscillator (VCO) as a multi-bit quantizer. In the feedback path of the /spl Delta//spl Sigma/ ADC, the errors due to component mismatch are avoided by using a single-path for all the levels in a multi bit digital to-analog converter (DAC). The technique eliminates the need for feedback DAC architectures with static and dynamic component matching.

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