Time elastic digital systems and Petri Nets

Abstract

Summary form only given. Digital electronic systems typically uses synchronous clocks and primarily assume fixed duration of their operations to simplify the design process. Time elastic systems can be constructed either by replacing the clock with communication handshakes (asynchronous version) or by augmenting the clock with a synchronous version of a handshake (synchronous version). Time elastic systems can tolerate static and dynamic changes in delays (asynchronous case) or latencies (synchronous case) of operations that can be used for modularity, ease of reuse and better power- delay trade-off. We describe methods for modeling, performance analysis and optimization of elastic systems using Marked Graphs and their extensions, capable of describing behavior with early evaluation by modeling negative tokens that can kill positive tokens representing the information flow. While this extended model is capable of modeling a broader class of behavior involving early evaluation many properties of classic Marked Graphs are still satisfied. For example, the sum of tokens in a cycle is an invariant even for the extended Dual Marked Graph model. We illustrate the optimization opportunities that exist in elastic systems by demonstrating a method for correct-by- construction micro-architectural pipelining that can handle cyclic systems with dependencies between iterations. This method allows one to introduce micro-architectural details into a functional specification of a system. We use synchronous elastic systems (a.k.a. latency- tolerant systems) for illustrating the use of Petri Nets, however most of the methods can be applied with only minor changes to asynchronous elastic systems.