Abstract
The ability to process time-encoded signals with high fidelity is becoming increasingly important for the time domain (TD) circuit techniques that are used at the advanced nanometer technology nodes. This paper proposes a compact oscillator-based subsystem that performs precise filtering of asynchronous pulse-width modulation encoded signals and makes extensive use of digital logic, enabling low-voltage operation. First- and second-order primitives are introduced that can be used as TD memory or to enable analogue filtering of TD signals. These structures can be modeled precisely to realize more advanced linear or nonlinear functionality using an ensemble of units. This paper presents the measured results of a prototype fabricated using a 65-nm CMOS technology to realize a fourth-order low-pass Butterworth filter. The system utilizes a 0.5-V supply voltage with asynchronous digital control for closed-loop operation to achieve a 73-nW power budget. The implemented filter achieves a maximum signal to noise and distortion ratio of 53 dB with a narrow 5-kHz bandwidth resulting in an figure-of-merit of 8.2 fJ/pole. With this circuit occupying a compact 0.004-mm2 silicon footprint, this technique promises a substantial reduction in size over conventional Gm-C filters, whilst additionally offering direct integration with digital systems.
Highlights
M ODERN digital architectures and energy constrained devices are being increasingly challenged by device variability and probabilistic computation that are incompatible with today’s digital paradigm [1]
This prototype integrates a number of time domain (TD) sensing systems together where the TD ring oscillator based filter (ROF) structure is located in the lower left section
The SPI interface allows the hardware to be reconfigured using a configuration register where 3 bits are used to fine tune the biasing current IB and another 10 bits are used for variable gain (VG) settings and output control
Summary
M ODERN digital architectures and energy constrained devices are being increasingly challenged by device variability and probabilistic computation that are incompatible with today’s digital paradigm [1]. The nature of digital provides immunity to supply noise and flexibility in signal representation that is less sensitive to operating conditions when compared to conventional voltage or current mode processing These techniques are becoming increasingly more widespread in recent years extending from the typical use in phase locked loops (PLL) towards sensing [8] and processing applications [9]. This work proposes a ring oscillator based filter (ROF) structure that reduces the complexity of existing TD systems to realise a compact TD filter with closed loop operation for ultralow-power computationally intensive applications [18], [19] The dynamics of this architecture are, in some way, similar to asynchronous delta sigma modulators [20] or asynchronous delta modulators [21], [22]. The remainder of this paper is organised as follows: Section II describes the basic first/second order ROF structures and ‘analogue’ processing characteristics; Section III elaborates on digital processing techniques for manipulating TD signals; Section IV details the transistor level implementation; Section V presents measured results and device characteristics; and Section VI concludes this work with respect to the achieved performance
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