Time-Domain Modeling and Analysis of Switched-Capacitor Converters

Abstract

This article proposes time-domain modeling and analysis of switched-capacitor converters (SCCs) by homogenizing the state-space model, resulting in a closed-form expression of the output voltage as a function of time without requiring discretization and subsequent numerical solution. The proposed technique facilitates obtaining the steady-state output voltage at any arbitrary time within a period, rather than at one discrete time at the beginning or end of the clock period. Circuit-level simulations for various SCC topologies, viz. , series–parallel (SP), ladder (LD), Fibonacci (FB), and Dickson (DK), show excellent agreement of the time-domain behavior as well as the equivalent resistance of the converter with the proposed technique. The proposed technique gives more than an order-of-magnitude improvement in simulation time. Experimental data for SP and LD topologies have been used to validate the accuracy of the proposed technique.