Abstract
The time dependent dielectric breakdown phenomenon in copper low-k damascene interconnects for ultra large-scale integration is reviewed. The loss of insulation between neighboring interconnects represents an emerging back end-of-the-line reliability issue that is not fully understood. After describing the main dielectric leakage mechanisms in low-k materials (Poole-Frenkel and Schottky emission), the major dielectric reliability models that had appeared in the literature are discussed, namely: the Lloyd model, 1/E model, thermochemical E model, E1/2 models, E2 model and the Haase model. These models can be broadly categorized into those that consider only intrinsic breakdown (Lloyd, 1/E, E and Haase) and those that take into account copper migration in low-k materials (E1/2, E2). For each model, the physical assumptions and the proposed breakdown mechanism will be discussed, together with the quantitative relationship predicting the time to breakdown and supporting experimental data. Experimental attempts on validation of dielectric reliability models using data obtained from low field stressing are briefly discussed. The phenomenon of soft breakdown, which often precedes hard breakdown in porous ultra low-k materials, is highlighted for future research.
Highlights
Since the beginning of the 21st century, the semiconductor industry has adopted low dielectric constant dielectrics as the insulating material in multi-level copper damascene interconnects for ultra large-scale integration (ULSI) integrated circuits (IC) [1]
We provide an up-to-date review on the time dependent dielectric breakdown (TDDB)
It was found that if the exponential function in the thermochemical model were used without modification, the measured time to failure (TTF) cannot be fitted by one set of fitting parameters only for experimental data collected from test structures at different temperatures
Summary
Since the beginning of the 21st century, the semiconductor industry has adopted low dielectric constant (low-k) dielectrics as the insulating material in multi-level copper damascene interconnects for ultra large-scale integration (ULSI) integrated circuits (IC) [1]. Due to the inferior dielectric breakdown strength and the nanoscale half pitch spacing in present ULSI local interconnects, the electric fields within the low-k materials can approach 1MV/cm Since 2003, many dielectric reliability models have been proposed to explain and predict the TDDB phenomenon in low-k dielectrics under electrical bias stress This is an indication that the state of understanding of this field is far more limited than that for thin gate oxide (SiO2) TDDB in the 1990s. In order to evaluate a new low-k dielectric with lower dielectric constant, the performance at operational electric fields has to be extrapolated from the TTF measured during accelerated testing where higher fields are applied This extrapolation is based on the important assumption that the mechanism of failure at high and low fields is identical. A brief discussion of soft breakdown in ultra low-k dielectrics is given before the conclusion and outlook
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