Abstract

A new concurrent test method is described to verify the thyristor high-frequency capability and also describe a digital computer thyristor simulation program which accounts for the many variables of high-frequency applications. The thyristor model will be described in detail along with the method by which the model is aligned to the empirical concurrent test of the device. A sensitivity analysis will be presented to give the percent change in thyristor high-frequency capability due to changing other variables such as delay time of anode current, the RC dv/dt network and gate drive for standard (non-di/namic gage) devices.

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