Abstract

Laser integration and photonics chip packaging are the two key challenges that require attention to drive down the cost/bit metric for silicon photonics based optical interconnects. We try to address the latter by demonstrating optical interfaces that fit well in an overall scheme of 2.5D/3D electro-optic integration needed for a high performance computing environment. A through-substrate coupling interface provides the benefit of bonding a silicon photonic chip face-up on a package substrate such that the device-side of the chip remains accessible for die-stacking and fiber-array packaging, thereby offering a promising alternative to flip-chip based packaging. In this paper, we demonstrate three through-substrate coupling elements to enable alignment tolerant and energy-efficient integration of silicon photonics with board-level or package-level optical interconnects : (i) a downward directionality O-band grating coupler with a peak -2.3 dB fiber-to-silicon waveguide coupling efficiency; (ii) polymer microlenses hybrid integrated onto the substrate of a silicon photonic chip to produce an expanded collimated beam at λ=1310 nm for a distance of more than 600 μm; (iii) a ball lens placed in a through-package via to result in a 14 μm chip-to-package 1-dB lateral alignment tolerance for coupling into a 20×24 µm squared cross-section board-level polymer waveguide.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.