Throughput Analysis of Multiple-Bus Multiprocessor Systems with Simultaneous Possession of Common Resources

Abstract

To answer the questions for the performance issues of multiple-bus multiprocessor systems under general conditions, a discrete-event simulation model has been developed. This model has been analyzed for different types of probability distributions for random variables A = processing times and B = memory access times for processors. For variables A and B, the following types of distributions are employed: exponential, Erlang, hypoexponential, hyperexponential, normal and constant. Simulation experiments show that the coefficient of variation of B, CB has a significant effect on the system performance, especially for CB>1, but the effect of CA is negligible if A is either hypo- or hyperexponentially distributed. However, this is not the case for a normal distribution. Processing efficiency, memory utilization and the percent of queued processors are some of the performance metrics used in our simulation model. We simulated several multiprocessor configurations and reach the conclusion that if the number of buses is equal to half the minimum value of the number of processors and the number of memory modules, the corresponding bus-deficient system behaves as a bus-sufficient system. Clearly, this is a substantial saving for the required number of buses without degrading the system performance.