Through-the-gate-implanted ultrathin gate oxide MOSFET's with corner parasitics-free shallow-trench-isolation

Abstract

We have realized direct-tunneling (DT) gate oxide (1.6 nm) NMOS and PMOS transistors by means of through-the-gate-implantation in a corner parasitics-free shallow-trench-isolation CMOS technology. In order to take full advantage of in situ cluster-tool processing and to preserve initial wafer-surface quality, the essential part of the MOS gate is fabricated prior to device isolation and through-the-gate-implantation is utilized for well- and channel-doping. In addition, a fully-reinforced-gate-oxide-perimeter is provided and trench corner parasitics are eliminated by the advanced process architecture without increasing process complexity. Fully functional direct-tunneling oxide MOSFET's with excellent electrical characteristics confirm the feasibility of this novel approach.