Abstract

This paper presents a novel 3-D capacitive interconnection technology for a 3-D microsystem, which is called through-silicon capacitor (TSC). Two vias similar to through-silicon via (TSV) are bonded vertically by one oxide bonding layer to form the capacitive coupling. Without the adoption of the backside via revealing process, the complicated back-thinning process for TSC will be reduced further, resulting in the lower cost and lower yield loss for 3-D microsystem. Finite-element analysis indicates that under the same dimensions, TSC has much stronger capacitive coupling effect than conventional capacitive coupling interconnect does. Then, SPICE simulation is carried out and demonstrates that a TSC channel with the radius of $2.5~\mu \text{m}$ , the height of 30- $\mu \text{m}$ via, and the thickness of 1- $\mu \text{m}$ bonding layer can achieve 4-Gb/s data rate and consumes only 0.08 mW/(Gb/s). Moreover, the high-frequency analysis shows that the far-end crosstalk induced by TSC is superior to that induced by TSV. Finally, the potential applications, features, advantages, and disadvantages of TSC, TSV, and capacitive coupling interconnection (CCI) technologies are compared.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call