Threshold-voltage shift model based on electron tunneling under positive gate bias stress for amorphous InGaZnO thin-film transistors

Abstract

An analytical threshold-voltage (Vth) shift model of amorphous InGaZnO thin-film transistors (a-IGZO TFTs) under positive gate bias stress (PGBS) is reported in this paper. It is demonstrated that electrons in active layers of a-IGZO TFTs can tunnel into gate insulators when PGBS is applied, and a portion of the tunneled electrons would tunnel back. The transfer distance of the tunneled electrons and the time-dependent electron distribution in gate insulators are analyzed with the back-tunneling effect taken into consideration. Finally the Vth shift under PGBS is predicted and the influences of gate voltage and stress time are discussed. The calculated Vth shift under PGBS shows good consistency with the reported experimental data.