Abstract

AbstractWith the decrease in dimensions of ULSI circuits in accordance with the scaling law [1], the electrical thickness of gate dielectric materials should be decreased. Dielectric materials with higher dielectric constant (high-k) should replace conventional SiO2. Hafnium-based gate stacks have been proposed to be one of the most promising candidates, although reliability issues are being discussed [2–4]. On the other hand, as the critical dimension of feature size in devices has shrunk and new materials have been introduced, plasma-induced damage (PID) have been pointed out [5–8]. PID is a significant reliability issue for high-k gate dielectrics as long as plasma is used for device fabrication and has been studied by many groups [8–10]. However, there have been few comprehensive studies of PID to high-k devices caused by different plasma sources so far, in particular, of the charging polarity during plasma processing, extensively studied during the last two decades for SiO2. Consideration of the charging polarity has recently been recognized as one of indispensable guidelines in designing an antenna rule [11] for different devices (n- or p-channel) to prevent a yield loss [12]. In order to understand the PID mechanisms, the charging polarity to high-k devices should be investigated in detail. The purpose of this paper is to address the polarities of charging damage to high-k dielectric as well as those of charging stress driven by plasmas, by focusing on the effects of the plasma source type (Ar- and Cl-based gas mixture) and device type (n- or p-channel) on performance degradation. Threshold voltage shift instability induced by plasma charging damage will be reported and the implication will be discussed.KeywordsCharge PolarityGate LeakageApplied Gate VoltageGate Dielectric MaterialLangmuir Probe MeasurementThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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