Threshold voltage instability of a static RAM under 77-K operation

Abstract

Threshold voltage instability of MOSFETs in an n-MOS static RAM under accelerated operating test conditions at 77 K has been studied. It is found that under high bias operations (supply voltage ≥ 7 V) at 77 K, a threshold voltage shift occurs, due to the presence of negative and positive charges in the gate oxide. The negative charge is caused by trapping the injected electrons in the pre-existing electron traps. The majority of electrons are thermally re-emitted, as the samples are warmed to room temperature. On the other hand, the presence of positive charges is a dominant factor in the threshold voltage shift under these test conditions. A simple quantitative model to explain the mechanism of positive charge generation responsible for the negative threshold-voltage shift is proposed. Some samples show that, from the analysis, the amount of saturated negative shift in threshold voltage can be estimated to be 100 mV at most.