Abstract

Three dimensional electron optical simulations were used to model scanning tunneling microscope (STM) lithography in resists under field emission conditions. This work focuses on the effect of resists, as dielectric layers, between the tip and conducting substrate on the operation of the STM. Simulations were run for resist thicknesses of 1–50 nm, which are comparable to our experiments, and tip–resist separations of 1–20 nm. Simulations were run for a ‘‘best’’ tip of radius 10 nm and a typical tip of radius 50 nm. The results show that the presence of a resist layer dramatically reduces the range of stable STM operation, which is observed experimentally. For a given tip–substrate distance and fixed tip–substrate voltage, the interposition of the dielectric layer expels electric field and causes the electric field at the tip to increase. Although the tip will retract from the substrate, the tip–resist distance is less than the prior tip–bare substrate distance, for the same tip–sample voltage and same electric field at the tip. The effect increases with resist thickness. For a 25 nm thick resist layer, the STM will operate a factor of 2 closer to the resist than a bare substrate. In addition, the energy of the electrons entering the resist is 50% less than the applied tip–substrate bias. Estimates of spot size based upon emission centered about the tip–sample axis are ≤15 nm, which is consistent with the best experimental results.

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