Thread mapping using system-level throughput prediction model for shared memory multicores

Abstract

The primary purpose of the current paper is to design a fast and accurate performance model framework for exploring various thread-to-core mapping strategies (MS) and estimating steady state cycles per instruction (CPI). It is directed towards efficiently exploring these performance metrics for large parallel applications for shared memory multicores. This work establishes a hybrid Markov Chain Model (MCM) and Model Tree (MT) based system-level performance prediction model framework. The model is validated with an Electromagnetics application for 12 different mapping strategies. The average performance prediction error is 0.168% with standard deviation of 3.866%. The total run time of model is of the order of minutes, whereas the actual application execution time is in terms of several days.