Thin Silicon Epitaxial Layer Deposition with Reduced Pressure RTP-CVD

Abstract

ABSTRACTDesigns of the advanced integrated circuit devices now require much thinner epitaxial films to achieve superior performance. The capability of depositing thin silicon epitaxial layers which have sharp transition width, well-controlled dopant level, high crystallographic quality, and good growth uniformity across the wafer is essential for high speed bipolar and submicron CMOS technologies. This paper describes a thin silicon epitaxial growth process using a recently developed low pressure CVD silicon epitaxial reactor employing rapid thermal processing with incoherent light source. Crystallographic quality, slip formation, transition width, growth uniformity, and dopant uniformity were investigated using TEM, spreading resistance measurements, SIMS, sheet resistance measurements, and FTIR. The SIMS and spreading resistance measurements revealed that auto-doping effect has been minimized. The transition width can be controlled to 10% of the film thickness while maintaining the growth rate up to 1 μm/min at a deposition temperature in the range of 900 - 1000°C. The growth and dopant uniformities across the wafer as determined by FTIR and Prometrix RS-30 Omnimap are better than 1% and 3% per sigma for epitaxial layer thickness under 2 μm. Initial results on selective epitaxial growth was discussed.